By Christopher R. Carroll (auth.), Carver Mead, Mohammed Ismail (eds.)
This quantity comprises the complaints of a workshop on Analog built-in Neural platforms held may possibly eight, 1989, in reference to the foreign Symposium on Circuits and platforms. The displays have been selected to surround the total diversity of subject matters presently less than examine during this interesting new self-discipline. Stringent reputation requisites have been put on contributions: (1) each one description was once required to incorporate precise characterization of a operating chip, and (2) every one layout was once to not were released formerly. in different instances, the prestige of the venture was once now not recognized till a couple of weeks sooner than the assembly date. for this reason, essentially the most fresh leading edge paintings within the box used to be offered. simply because this self-discipline is evolving swiftly, each one venture is particularly a lot a piece in growth. Authors have been requested to commit huge recognition to the shortcomings in their designs, in addition to to the striking successes they completed. during this method, different staff can now steer clear of stumbling into a similar traps, and evolution can continue extra speedily (and much less painfully). The chapters during this quantity are provided within the related order because the corresponding displays on the workshop. the 1st chapters are occupied with fmding recommendations to complicated optimization difficulties below a predefmed set of constraints. the 1st bankruptcy experiences what's, to the simplest of our wisdom, the 1st neural-chip layout. In every one case, the physics of the underlying digital medium is used to symbolize a price functionality in a typical manner, utilizing purely nearest-neighbor connectivity.
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Extra info for Analog VLSI Implementation of Neural Systems
1V. about ±500mV. Figure 7 shows a family ofI-V curves measured by varying VB and holding VA constant. We are studying the use of a high-gain fuse, a circuit that does not have a large incrementally active region in its I-V curve (Fig. 8). Circuit simulations of the high-gain fuse show I-V curves that look like those of the infinite-gain fuse in Fig. 3A. Instead of feeding the absolute-value current back to the resistor bias circuits, current is fed back to a pass gate that acts as a binary switch in the current path.
Due to irregularities in the processors and the interconnections between them. some of the nodes will pass the wavefront on a 24 little more quickly than others, resulting in slight bulges in what should be a plane wavefront. Fortunately, this affects the operation of the Pathfinder system in unimportant ways, resulting in paths that are slightly more costly than minimal being chosen on occasion, but never causing the algorithm to fail due to noise accumulation. This demonstrates a quality that is common to any system that involves analog inputs or parameters.
Ikeuchi, K. and Horn, B. K. P. (1981). Numerical shape from shading and occluding boundaries. Artif. Intell. 17:141-184. , and Mead, C. (1988). Computing motion using analog and binary resistive networks. IEEE Computer 21:52-63. Ikeuchi, K. and Horn, B. K. P. (1981). Numerical shape from shading and occluding boundaries. Artif. Intell. 17:141-184. , and Yuille, A. (1986). Analog "neuronal" networks in early vision. Proc. Natl. Acad. Sci. USA 83:4263-4267. Koch, C. (1989). Seeing chips: analog VLSI circuits for computer vision.